Patent Number: 6,480,415

Title: Nonvolatile semiconductor memory device

Abstract: A nonvolatile semiconductor memory device includes a memory array which comprises a plurality of memory cells of a type wherein predetermined voltages are applied to selected memory cells to change their threshold voltages, whereby information are stored therein according to the difference between the threshold voltages, and whose some memory cells are used as spare memory cells. The nonvolatile semiconductor memory device is provided with a latch circuit connected to each bit line of the memory array through a transmission switch. The memory array is capable of storing therein at least substitutional information for replacing a defective bit by the spare memory cell. The substitutional information is transferred from the memory array to the latch circuit through the transmission switch and held in the latch circuit.

Inventors: Makuta; Kiichi (Kodaira, JP), Fujita; Akihiro (Kokubunji, JP), Kasai; Hideo (Musashino, JP), Wada; Masashii (Kodaira, JP), Toukairin; Atsushi (Kodaira, JP)

Assignee: Hitachi, Ltd.

International Classification: G11C 29/00 (20060101); G11C 016/06 ()

Expiration Date: 11/12/2019