Patent Number: 6,480,439

Title: Semiconductor device

Abstract: Consuming current must be reduced in each operation state of a semiconductor device which operates in synchronized with an external clock signal. However, in each operation state, for satisfying the stability of an operation and a speedup, the suppression of consuming current has been performed under difficult circumstances. For solving this problem, a clock generation circuit generating an internal clock signal based on an external clock signal is activated during a specific time period when a clock synchronization circuit is in a state of inactivation.

Inventors: Tokutome; Hiroto (Tokyo, JP), Ikeda; Yutaka (Tokyo, JP)

Assignee: Mitsubishi Denki Kabushiki Kaisha

International Classification: G11C 7/10 (20060101); G11C 8/00 (20060101); G11C 7/22 (20060101); G11C 8/18 (20060101); G11C 7/00 (20060101); G11C 11/407 (20060101); G11C 11/4076 (20060101); G11C 008/00 ()

Expiration Date: 11/12/2019