Patent Number: 6,486,885

Title: Memory device and method

Abstract: A memory device for storing a sequential image data in succession andoutputting the stored image data is provided. The memory device comprisesa memory unit comprising N memory blocks, each memory blocks being capableof individual serving, a write address generator for generating a writeaddress signal to write into the memory unit and a read address generatorfor generating a read address signal to read from the memory unit. Thememory unit further comprises a controller for controlling the writeaddress signal and the read address signal so that each start address forwriting and reading for each image data is shifted as unit of the memoryblock and the writing and reading operation are not simultaneouslyperformed to same memory block, each image data having a size beingequivalent to one of M blocks (M<N).

Inventors: Okumura; Akihiro (Kanagawa, JP), Kondo; Tetsujiro (Tokyo, JP)

Assignee:

International Classification: G11C 7/10 (20060101); G11C 8/04 (20060101); H04N 5/44 (20060101); H04N 5/21 (20060101); G06F 012/06 ()

Expiration Date: 11/22015