Patent Number: 6,512,395

Title: Configurable memory for programmable logic circuits

Abstract: An apparatus comprising a memory device and a programmable logic device. The memory device may be configured to (i) connect to a first bus and a second bus and (ii) operate in one or more modes in response to one or more control signals. The programmable logic device may be configured to generate the control signals.

Inventors: Lacey; Timothy M. (Bedford, NH), Johnson; David L. (Pleasanton, CA)

Assignee: Cypress Semiconductor Corp.

International Classification: H03K 19/177 (20060101); H03K 019/177 (); H03K 019/173 ()

Expiration Date: 01/28/2020