Patent Number: 6,528,829

Title: Integrated circuit structure having a charge injection barrier

Abstract: The invention relates to an integrated circuit structure that includes asubstrate wafer having an active device layer disposed on a surface of thesubstrate wafer and having an electrically conductive element containedtherein. The integrated circuit structure further comprises a barrierdisposed between the substrate wafer and the active device layer, wherethe barrier blocks carriers injected into the substrate wafer and reduceslow frequency oscillation effect.

Inventors: Gutierrez-Aitken; Augusto L. (Redondo Beach, CA), Oki; Aaron K. (Torrance, CA), Wojtowicz; Michael (Long Beach, CA), Streit; Dwight C. (Seal Beach, CA), Block; Thomas R. (Los Angeles, CA), Yamada; Frank M. (Palos Verdes Estates, CA)


International Classification: H01L 29/267 (20060101); H01L 29/66 (20060101); H01L 29/02 (20060101); H01L 29/737 (20060101); H01L 21/20 (20060101); H01L 21/02 (20060101); H01L 029/70 (); H01S 003/19 ()

Expiration Date: 03/02015