Patent Number: 6,528,843

Title: Self-aligned split-gate flash memory cell having a single-side tip-shaped floating-gate structure and its contactless flash memory arrays

Abstract: A self-aligned split-gate flash memory cell of the present invention comprises a planarized control/select-gate conductive layer having a portion formed at least on a second gate-dielectric layer and another portion formed at least on a single-side tip-shaped floating-gate structure being formed on a first gate-dielectric layer, wherein a dielectric layer is formed over the single-side tip-shaped floating-gate structure to act as a first intergate-dielectric layer and a second intergate-dielectric layer is formed over an inner sidewall of the single-side tip-shaped floating-gate structure. The self-aligned split-gate flash memory cell is configured into two contactless array architectures: a contactless NOR-type flash memory array and a contactless parallel common-source/drain conductive bit-lines flash memory array.

Inventors: Wu; Ching-Yuan (Hsinchu, TW)

Assignee: Silicon Based Technology Corp.

International Classification: H01L 21/70 (20060101); H01L 29/66 (20060101); H01L 29/788 (20060101); G11C 16/04 (20060101); H01L 21/28 (20060101); H01L 21/02 (20060101); H01L 29/40 (20060101); H01L 21/8247 (20060101); H01L 27/115 (20060101); H01L 29/423 (20060101); H01L 029/788 ()

Expiration Date: 03/04/2011