Patent Number: 6,528,845

Title: Non-volatile semiconductor memory cell utilizing trapped charge generated by channel-initiated secondary electron injection

Abstract: The present invention provides a semiconductor device that comprises a tub region located in a semiconductor substrate, wherein the tub region has a tub electrical contact connected thereto. The semiconductor device further comprises a trap charge insulator layer located on the first insulator layer and a control gate located over the trap charge insulator layer. The control gate has a gate contact connected thereto for providing a second bias voltage to the semiconductor device that, during programming, is opposite in polarity to that of the first bias voltage.

Inventors: Bude; Jeffrey D. (New Providence, NJ), McPartland; Richard J. (Nazareth, PA), Singh; Ranbir (Orlando, FL)

Assignee: Lucent Technologies Inc.

International Classification: H01L 21/02 (20060101); H01L 29/66 (20060101); H01L 21/336 (20060101); H01L 29/792 (20060101); H01L 27/105 (20060101); H01L 29/788 (20060101); G11C 16/04 (20060101); H01L 27/115 (20060101); H01L 029/792 ()

Expiration Date: 03/04/2020