Patent Number: 6,529,056

Title: Circuit with FET transistor pair

Abstract: A circuit, and a method and computer program product for use with a switch having a field-effect transistor (FET). The method and computer program product include restricting the drain-source voltage of the FET to a predetermined range; and then switching the FET. In general, in one aspect, the invention features a circuit having source, drain and gate terminals. The circuit includes a first FET having a first drain coupled to the drain terminal and a first source coupled to the source terminal; a second FET having a second drain coupled to the drain terminal and a second source coupled to the source terminal; and a control circuit coupled to the gate terminal, the first gate, and the second gate.

Inventors: You; Budong (Fremont, CA), Zuniga; Marco A. (Dublin, CA)

Assignee: Volterra Semiconductor Corporation

International Classification: H03K 5/15 (20060101); H03K 5/08 (20060101); H03K 17/16 (20060101); H03K 17/30 (20060101); H03K 017/687 (); H03K 005/22 ()

Expiration Date: 03/04/2020