Patent Number: 6,670,826

Title: Configurable logic block with a storage element clocked by a write strobe pulse

Abstract: A configurable logic block for a programmable logic device includes a storage element having a latch clocked by a write strobe pulse. The storage element uses a write strobe signal and, optionally, a hold signal already present in the CLB. In one embodiment, the CLB includes a function generator, a write strobe generator providing hold and write strobe signals to the function generator, and a storage element driven by the function generator output signal and by the hold and write strobe signals from the write strobe generator. Because the CLB already includes a write strobe generator, it is not necessary to design additional logic to avoid race conditions in the storage element.

Inventors: Bauer; Trevor J. (Boulder, CO)

Assignee: Xilinx, Inc.

International Classification: H03K 19/177 (20060101); H03K 019/77 ()

Expiration Date: 12/30/2020