Patent Number: 6,670,895

Title: Method and apparatus for swapping the contents of address registers

Abstract: Methods and apparatus are provided for use in digital information processors that support digital memory buffers. In one aspect of the present invention, a digital signal processor receives a swap instruction and responds to the swap instruction by swapping the contents of a first address register and a second address register. In another aspect, a digital signal processor receives a swap instruction, swaps the contents of a first address register and a second address register in a future file, generates and sends one or more control signals to an architecture file in a downstream stage of a pipeline in response to the swap instruction, and swaps the contents of the first address register and the second address register in the architecture file in response to the one or more control signals.

Inventors: Singh; Ravi Pratap (Austin, TX)

Assignee: Analog Devices, Inc.

International Classification: G06F 9/38 (20060101); G06F 9/30 (20060101); G06F 9/315 (20060101); H03M 007/00 ()

Expiration Date: 12/30/2020