Patent Number: 6,674,304

Title: Output buffer circuit and method of operation

Abstract: An output buffer (100) contains a low voltage driver (110), a medium voltage driver (108), and a high voltage driver (106). When an output pad (112) is configured to operate between ground and the medium voltage, the low voltage driver (110) is first used during low-to-high transitions to drive the output pad (112) from ground to an intermediate voltage in a fast manner. After the intermediate voltage is obtained on the output pad (112), a detection circuit (111) will switch output pad control from the low voltage driver (110) to the medium voltage driver (108). The medium voltage driver (108) will drive the output pad (112) from the intermediate voltage to the final logic one output voltage. This two-stage low-to-high driving methodology ensures that there will be less delay time from input (DO) to the output pad (112). In addition, the drivers (108) and (110) contain protection transistors (228), (231), and (266) that allow programming on reset to be accomplished in an error free manner through use of the output pad (112) as an input during reset operations.

Inventors: Matthews; Lloyd P. (Buda, TX)

Assignee: Motorola Inc.

International Classification: H03K 17/16 (20060101); H03K 019/017 (); H03K 003/00 (); H03K 017/16 ()

Expiration Date: 01/06/2021