Patent Number: 6,674,328

Title: Amplifier circuit

Abstract: The amplifier circuit includes differential amplifier circuits (3 to 4); apeak detector circuit (7) for detecting a peak value of an output voltageof a differential amplifier circuit 4 of the last stage; an offsetcompensation voltage generator circuit (8) for generating an offsetcompensation voltage for offset compensation on the basis of a detectionresult of the peak detector circuit (7); and an offset output limitercircuit (9) for limiting the offset compensation voltage generated by theoffset compensation voltage generator circuit (8) into a predeterminedrange and feeding back the limited offset compensation voltage to adifferential amplifier circuit (3) of the first stage.

Inventors: Uto; Ken-ichi (Tokyo, JP), Motoshima; Kuniaki (Tokyo, JP)


International Classification: H03F 3/45 (20060101); H03F 003/45 ()

Expiration Date: 01/02016