Patent Number: 6,763,426

Title: Cascadable content addressable memory (CAM) device and architecture

Abstract: According to one embodiment, a CAM system (100) may include a plurality of CAM devices (102-0 to 102-n) arranged in cascade configuration. A CAM system (100) may include an input connection (104) that receives a request to perform a particular operation and an output connection (106) on which a CAM system (100) may provide a single response based on responses from each CAM device (102-0 to 102-n). In one particular approach, a request may flow through CAM devices (102-0 to 102-n) in a single direction from a first CAM device (102-0) to a last CAM device (102-n). Similarly, responses to requests may be generated in the same direction, from a first CAM device (102-0) to a last CAM device (102-n).

Inventors: James; David V. (Palo Alto, CA), Rajamanickam; Jagadeesan (Cupertino, CA)

Assignee: Cypress Semiconductor Corporation

International Classification: G11C 15/00 (20060101); G06F 012/00 ()

Expiration Date: 07/13/2021