Patent Number: 6,794,581

Title: Method and apparatus for distributing power to integrated circuits

Abstract: A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The integrated circuit for which power is to be distributed may be electrically coupled to the PCB. The power laminate may include one or more power planes and one or more reference (i.e. ground) planes, with each pair of power/reference planes separated by a dielectric layer. The power laminate may also include a connector or other means for receiving power from an external power source. The power laminate may be electrically coupled to the integrated circuit, thereby enabling it to provide power to the integrated circuit. The PCB may include a signal layer for conveying signals to and from the integrated circuit, but does not include any means for providing core power to the integrated circuit. Thus, all core power provided to the integrated circuit may be supplied by the power laminate.

Inventors: Smith; Larry D. (San Jose, CA), Novak; Istvan (Maynard, MA), Freda; Michael C. (Morgan Hill, CA), Hassanzadeh; Ali (Fremont, CA)

Assignee: Sun Microsystems, Inc.

International Classification: H05K 1/02 (20060101); H05K 1/14 (20060101); H05K 3/36 (20060101); H05K 001/16 ()

Expiration Date: 09/21/2021