Patent Number: 6,798,454

Title: Solid state image sensor system and method for driving same

Abstract: Every time signal charges, which are generated in pixels "1", "3", "5", . . . of one 1a of pixel rows 1a and 1b spaced from each other by a distance D, are transferred to a final stage 4a of an analog shift register 3a to be fed to a charge detecting part 5 in synchronism with a transfer clock .PHI.1B, a reset pulse RS is generated to discharge the signal charges to a reset drain 8. Signal charges, which are generated in pixels "2", "4", "6", . . . of the other pixel row 1b, are transferred to a final stage 4b of an analog shift register 3b, and then, stored in a capacity 6 of the charge detecting part 5 in synchronism with a transfer clock .PHI.2B. Then, the quantity of the stored signal charges is read out, and the stored signal charges are outputted from an output circuit 9 as an output signal OS. Thus, all of the signal charges of the pixel row 1a are discarded, and only the signal charges of the pixel row 1b are outputted, so that the signal charges can be read out at a resolution of 1/2 without deteriorating images.

Inventors: Kashiwagi; Minoru (Chigasaki, JP), Kanesaka; Yoshinori (Nagano-ken, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H04N 1/193 (20060101); H04N 1/191 (20060101); H04N 1/04 (20060101); H04N 005/335 (); H04N 001/04 ()

Expiration Date: 09/28/2021