Patent Number: 6,803,791

Title: Equalizing receiver with data to clock skew compensation

Abstract: A receiver performs on data to clock skew compensation by compensating ISI between signals, the ISI being caused by a bandwidth limitation generated in case of chip-to-chip communications in a digital system. A problem of an attenuation of a high frequency signal may occur due to an attenuation in a channel in case of a transmission of a signal at a high speed in the digital system. Therefore there is a limitation in transmitting data at a high speed. The receiver provides a circuit for applying an equalizing technology at the terminal of the receiver. And by compensating for the attenuation of a high frequency component of the signal by using the circuit, the transmission of a signal at a high speed is realized by over-sampling the signal and compensating the data to clock skew.

Inventors: Park; Hong-June (Pohang-shi, KR), Sohn; Young-Soo (Seoul, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: H03K 5/08 (20060101); H03K 019/00 ()

Expiration Date: 10/12/2021