Patent Number: 6,806,540

Title: Semiconductor device and method of manufacturing the same

Abstract: Disclosed is a semiconductor device comprising a first transistor and a second transistor formed on a semiconductor substrate, wherein a gate side wall of the second transistor has a thickness equal to that of a gate side wall of the first transistor, wherein each of the first and second transistors has an inner low impurity diffusion region and an outer high impurity diffusion region, and wherein the size of the inner low impurity diffusion region of the second transistor along the surface of the semiconductor substrate is larger than that of the inner low impurity diffusion region of the first transistor.

Inventors: Watanabe; Hiroshi (Yokohama, JP), Naruke; Kiyomi (Sagamihara, JP), Masuda; Kazunori (Yokkaichi, JP)

Assignee: Kabushiki Kaisha Toshiba

International Classification: H01L 21/70 (20060101); H01L 21/8247 (20060101); H01L 21/8234 (20060101); H01L 27/105 (20060101); H01L 029/76 (); H01L 029/94 (); H01L 031/062 (); H01L 031/113 (); H01L 031/119 ()

Expiration Date: 10/19/2012