Patent Number: 6,885,080

Title: Deep trench isolation of embedded DRAM for improved latch-up immunity

Abstract: A protective structure for blocking the propagation of defects generated in a semiconductor device is disclosed. In an exemplary embodiment, the structure includes a deep trench isolation formed between a memory storage region of the semiconductor device and a logic circuit region of the semiconductor device, the deep trench isolation being filled with an insulative material. The deep trench isolation thereby prevents the propagation of crystal defects generated in the logic circuit region from propagating into the memory storage region.

Inventors: Chen; Tze-Chiang (Yorktown Heights, NY), Han; Liang-Kai (Fishkill, NY)

Assignee: International Business Machines Corporation

International Classification: H01L 21/762 (20060101); H01L 21/70 (20060101); H01L 21/8234 (20060101); H01L 27/108 (20060101); H01L 029/00 ()

Expiration Date: 04/26/2022