Patent Number: 6,941,418

Title: Integrated circuit and method outputting data

Abstract: A circuit according to an embodiment of the present invention can load data in parallel to a barrel shifter, and output data to a pipelined multiplexer stage. The multiplexer is used to direct data from predetermined barrel slots to a predetermined number of output data slots. A control logic circuit will determine which of the barrel shifter entries are the oldest, and will drive the selects of the multiplexer to direct them to the output. The second stage of the multiplexer will drive the four 16-bit outputs to generate the 64-bit user data path. Methods for implementing the embodiments of the invention are also disclosed.

Inventors: Goolsby; Jeremy B. (Longmont, CO)

Assignee: Xilinx, Inc.

International Classification: G06F 12/00 (20060101); G06F 012/00 ()

Expiration Date: 09/06/2022