Patent Number: 6,946,065

Title: Process for electroplating metal into microscopic recessed features

Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.

Inventors: Mayer; Steven T. (Portland, OR), Bhaskaran; Vijay (Beaverton, OR), Patton; Evan E. (Portland, OR), Jackson; Robert L. (Lake Oswego, OR), Reid; Jonathan (Sherwood, OR)

Assignee: Novellus Systems, Inc.

International Classification: C25D 3/38 (20060101); C25D 5/18 (20060101); C25D 5/00 (20060101); H05K 3/42 (20060101); C25D 005/18 (); H01L 021/768 ()

Expiration Date: 09/20/2022