Patent Number: 6,967,129

Title: Semiconductor device and fabrication method thereof

Abstract: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.

Inventors: Yamazaki; Shunpei (Setagaya, JP), Murakami; Satoshi (Atsugi, JP), Koyama; Jun (Atsugi, JP), Tanaka; Yukio (Atsugi, JP), Kitakado; Hidehito (Atsugi, JP), Ohnuma; Hideto (Atsugi, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

International Classification: G02F 1/1362 (20060101); G02F 1/13 (20060101); H01L 29/786 (20060101); H01L 29/66 (20060101); H01L 21/70 (20060101); H01L 27/12 (20060101); H01L 21/84 (20060101); H01L 021/00 (); H01L 021/84 ()

Expiration Date: 1/22/02018