Patent Number: 7,042,754

Title: Ferroelectric memory device and electronic apparatus

Abstract: A ferroelectric memory device equipped with a plate line control section that selects a specified plate line that is connected to a specified memory cell, thereby discharging a data accumulation charge to a specified bit line connected to the specified memory cell, and discharges a reference accumulation charge to the specified bit line when the specified bit line is discharged; a device that, by successively connecting the specified bit line to a first sense amplifier line and a second sense amplifier line based on a change in the potential on the specified plate line, retains at the first sense amplifier line a potential on the specified bit line when the data accumulation charge is discharged, and retains at the second sense amplifier line a potential on the specified bit line when the reference accumulation charge is discharged; and a sense amplifier that judges the predetermined data based on potentials on the first sense amplifier line and the second sense amplifier line.

Inventors: Mukaiyama; Fumiaki (Nagano, JP)

Assignee: Seiko Epson Corporation

International Classification: G11C 11/22 (20060101)

Expiration Date: 5/09/02018