Patent Number: 7,042,786

Title: Memory with adjustable access time

Abstract: A memory comprising a memory array, an address buffer configured to receive an external address, a refresh address counter configured to generate a refresh address, a first circuit configured to detect a distance between the external address and refresh address, and a second circuit configured to generate at least one timing signal for accessing data associated with the external address from the memory array in response to the distance is provided.

Inventors: Oh; Jong-Hoon (Chapel Hill, NC)

Assignee: Infineon Technologies AG

International Classification: G11C 11/4063 (20060101); G11C 11/4076 (20060101); G11C 11/408 (20060101); G11C 11/4091 (20060101)

Expiration Date: 5/09/02018