Patent Number: 7,042,793

Title: Semiconductor memory device

Abstract: A column switch in a two-port SRAM (static random access memory) is provided with A-port switches, B-port switches, and inter-port switches. When it is detected that an A-port row address and a B-port row address match each other, all of the B-port switches are turned off, and an A-port bit line pair for a column selected according to A-port column decode signals is coupled to an A-port data line pair, while an A-port bit line pair for a column selected according to B-port column decode signals is coupled to a B-port data line pair.

Inventors: Masuo; Akira (Amagasaki, JP)

Assignee: Matsushita Electric Industrial Co., Ltd.

International Classification: G11C 8/00 (20060101)

Expiration Date: 5/09/02018