Patent Number: 7,046,283

Title: Arrangements of clock line drivers

Abstract: A circuit includes a circuit chip and a plurality of clock drivers external to the circuit chip. The circuit chip includes a plurality of isolated clocking subunits and a corresponding plurality of terminals. Each clocking subunit is electrically isolated from any other clocking subunit. Each clocking subunit is coupled to a respective terminal. For each of the plurality of terminals, an output from one and only one clock driver of the plurality of clock drivers is coupled to the corresponding terminal of the plurality of terminals, and inputs of all clock drivers are coupled together.

Inventors: Kamasz; Stacy R. (Waterloo, CA), Kiik; Martin J. (Waterloo, CA)

Assignee: DALSA, Inc.

International Classification: H04N 3/14 (20060101); H01L 27/148 (20060101); H01L 29/76 (20060101); H01L 29/768 (20060101); H04N 5/335 (20060101)

Expiration Date: 5/16/02018