Patent Number: 7,085,336

Title: Signal transmission circuit and method for equalizing disparate delay times dynamically, and data latch circuit of semiconductor device implementing the same

Abstract: A signal transmission circuit and a method equalize differential delay characteristics of two signal transmission lines. A controllable delay unit is connected serially to the second line, so as to compensate by adding its internal delay. An auxiliary signal transmission line replicates the second transmission line, while it processes the input signal of the first. A controlling unit compares the output signal of the first transmission line and the of the auxiliary signal transmission line, and adjusts dynamically the internal delay of the controllable delay unit, to attain continuous synchronization. A data latch circuit synchronizes the delays of data paths by having one controllable delay units in each of the data paths.

Inventors: Lee; Jung-bae (Kyunggi-do, KR), Kim; Kyu-hyoun (Kyunggi-do, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: H04L 7/00 (20060101)

Expiration Date: 8/01/02018