Patent Number: 7,085,972

Title: System for testing a group of functionally independent memories and for replacing failing memory words

Abstract: System for testing a group of functionally independent memories (102) and for replacing failing memory words of the group of functionally independent memories (102) by redundant memory words, comprising: redundancy means 108) including at least one array of redundant memory words (108a) and address registers (108b) connected to at least one array of redundant memory words (108a); a test means (114); a group of first multiplexers (110) following the test means (114) and preceding the memories (102) and the at least one array of redundant memory words (108a); and a group of second multiplexers (112) following the memories (102) and the at least one array of redundant memory words (108a), wherein each second multiplexer (112) is connectable to the test means (114).

Inventors: Borri; Simone (Antibes, FR), Kirmser; Stephane (Munich, DE)

Assignee: Infineon Technologies AG

International Classification: G11C 29/00 (20060101)

Expiration Date: 8/01/02018