Patent Number: 7,086,022

Title: Semiconductor integrated circuit using the same

Abstract: A hard macro cell which prevents signal delay and quality deterioration of signal waveforms without requiring excessively long wires, and a semiconductor integrated circuit using the hard macro cell. The semiconductor integrated circuit includes the hard macro cell and other hard macro cells, which are functional blocks for performing predetermined functions. The hard macro cell is provided with input/output terminals for connecting the hard macro cell with the other hard macro cells, a repeater for overcoming signal delay and for improving the quality of signal waveforms, and an input terminal and an output terminal for connecting global wires which connect the other hard macro cells to the repeater. Signals outputted from an output terminal of one of the other hard macro cells are inputted to an input terminal of another of the other hard macro cells via the global wires and the repeater.

Inventors: Kurimoto; Masahiro (Yamanashi-ken, JP)

Assignee: Oki Electric Industry Co., Ltd.

International Classification: G06F 17/50 (20060101)

Expiration Date: 8/01/02018