Patent Number: 7,087,476

Title: Using different gate dielectrics with NMOS and PMOS transistors of a complementary metal oxide semiconductor integrated circuit

Abstract: Complementary metal oxide semiconductor integrated circuits may be formed with NMOS and PMOS transistors having different gate dielectrics. The different gate dielectrics may be formed, for example, by a subtractive process. The gate dielectrics may differ in material, thickness, or formation techniques, as a few examples.

Inventors: Metz; Matthew V. (Hillsboro, OR), Datta; Suman (Beaverton, OR), Kavalieros; Jack (Portland, OR), Doczy; Mark L. (Beaverton, OR), Brask; Justin K. (Portland, OR), Chau; Robert S. (Beaverton, OR)

Assignee: Intel Corporation

International Classification: H01L 21/8238 (20060101)

Expiration Date: 8/08/02018