Patent Number: 7,087,509

Title: Method of forming a gate electrode on a semiconductor device and a device incorporating same

Abstract: The present invention is directed to a semiconductor device having a gate electrode includes of a plurality of sidewalls, each having a recess formed therein. The present invention is also directed to a method of forming a semiconductor device. In one illustrative embodiment, the method comprises forming a layer of dopant material in a layer of polysilicon and etching the layer of polysilicon to define a gate electrode having a plurality of sidewalls, each of which have a recess formed therein.

Inventors: Roche; William R. (Beaverton, OR), Wu; David Donggang (Austin, TX), Aminpur; Massud (Dresden, DE), Luning; Scott D. (Austin, TX)

Assignee: Advanced Micro Devices, Inc.

International Classification: H01L 21/3205 (20060101); H01L 21/4763 (20060101)

Expiration Date: 8/08/02018