Patent Number: 7,087,528

Title: Chemical-mechanical polishing (CMP) process for shallow trench isolation

Abstract: A method of forming shallow trench isolation includes etching trenches through a nitride layer, a polysilicon layer, and a pad oxide layer and into a semiconductor substrate. The trenches are filled with an oxide layer. A silicon oxynitride layer is deposited overlying the oxide layer and both these layers are polished away using a first slurry having high selectivity. A second polishing polishes away the oxide layer using a second slurry having a low selectivity. The nitride layer is removed and a third polishing is performed to planarize the oxide layer using a third slurry having high selectivity. Alternatively, the oxide layer is etched away except where it overlies the trenches. A first polishing is performed to polish away the oxide layer using a first slurry having a low selectivity. A second polishing is performed to polish away the oxide layer using a second slurry having high selectivity.

Inventors: Cheng; Juing-Yi (Chi Shange Town, Kaoshung County, TW), Su; Kevin (Jubei, TW)

Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.

International Classification: H01L 21/302 (20060101)

Expiration Date: 8/08/02018