Patent Number: 7,088,138

Title: Symmetric and non-stacked XOR circuit

Abstract: A CML XOR logic circuit is provided that includes a pair of pull-up transistors, a pair of current source transistors and a logic switch network coupled between the pull-up transistors and the current source transistors. The logic switch network including a plurality of transistors divided into a first branch, a second branch and a third branch. A tail current flows through the first branch, the second branch or the third branch based on at least two input signals to the plurality of transistors.

Inventors: Xu; Jianping (Portland, OR), Paillet; Fabrice (Hillsboro, OR), Karnik; Tanay (Portland, OR)

Assignee: Intel Corporation

International Classification: H03K 19/21 (20060101)

Expiration Date: 8/08/02018