Patent Number: 7,088,191

Title: Delay interpolation in a ring oscillator delay stage

Abstract: According to some embodiments, a circuit includes a delay stage of a ring oscillator. The delay stage may include a first differential pair, a second differential pair, and a third differential pair. The first differential pair may be coupled to a first current-steering circuit, receive a differential input signal, and output a first differential signal. The second differential pair may receive the differential input signal and output a second differential signal, and the third differential pair may be coupled to a second current-steering circuit, receive the second differential signal from the second differential pair, and output the first differential signal. An amount of delay between the differential input signal and the first differential signal is based on relative amounts of current steered by the first current-steering circuit and the second current-steering circuit.

Inventors: Paillet; Fabrice (Hillsboro, OR), Rennie; David (Etobicoke, CA), Karnik; Tanay (Portland, OR), Xu; Jianping (Portland, OR)

Assignee: Intel Corporation

International Classification: H03K 3/03 (20060101); H03L 7/00 (20060101)

Expiration Date: 8/08/02018