Patent Number: 7,088,606

Title: Dynamic RAM storage techniques

Abstract: Dynamic RAM (DRAM) cells are provided. Data can be read from a DRAM cell without draining the stored charge stored in the cell. During a read cycle, current flows between a Read Bit line and a supply voltage, and charge is not drained directly from the DRAM storage node. Each DRAM cell has a small number of transistors. The DRAM cell can be used to store configuration data on a programmable integrated circuits (IC). Pass gates are used on programmable ICs to drive signals across the chip. Data stored in DRAM cells is provided directly to the pass gates at the full supply voltage to prevent signal degradation.

Inventors: Turner; John (Santa Cruz, CA)

Assignee: Altera Corporation

International Classification: G11C 11/24 (20060101)

Expiration Date: 8/08/02018