Patent Number: 7,088,618

Title: Method of evaluating characteristics of semiconductor memory element, and method of extracting model parameter of semiconductor memory element

Abstract: A characteristic evaluating method of precisely obtaining a resistance value of an offset region in a semiconductor memory element constructed so that the resistance value of the offset region positioned below a memory function element formed on one side or both sides of a gate electrode changes according to an amount of charges or a polarization state of charges accumulated in said memory function element includes: a step of obtaining each of a resistance value between two diffusion regions inclusive formed on both sides of a channel region disposed just below the gate electrode of the semiconductor memory element via a gate insulating film, a resistance value of the channel region, and a resistance value of the diffusion regions; and a step of calculating the resistance value of the offset region which isolates the channel region and the diffusion region from each other on the basis of a result of subtracting the resistance value of the channel region and the resistance value of the diffusion regions from the resistance value between the two diffusion regions.

Inventors: Hoshino; Kozo (Tenri, JP), Iwata; Hiroshi (Nara, JP), Shibata; Akihide (Nara, JP)

Assignee: Sharp Kabushiki Kaisha

International Classification: G11C 16/04 (20060101); G11C 11/22 (20060101)

Expiration Date: 8/08/02018