Patent Number: 7,101,740

Title: Electronic devices comprising bottom-gate TFTs and their manufacture

Abstract: A method of manufacturing an electronic device comprising a bottom-gate TFT (12) is provided, the method comprising the steps of: forming a doped amorphous silicon gate layer (26') on a substrate, the gate layer defining a gate (26), forming a gate insulating layer (32) over the gate, forming an amorphous silicon active layer (28') over the gate insulating layer and overlying at least part of the gate, and annealing the amorphous silicon active layer to form a polysilicon active layer (28). A thinner gate insulating layer can be used giving a TFT having a low threshold voltage.

Inventors: Young; Nigel D. (Redhill, GB)

Assignee: Koninklijke Philips Electronics N.V.

International Classification: H01L 21/70 (20060101)

Expiration Date: 9/05/02018