Patent Number: 7,101,759

Title: Methods for fabricating nonvolatile memory devices

Abstract: Methods of fabricating nonvolatile memory devices are disclosed. A disclosed method comprises forming a trench isolation layer on a substrate; forming an oxide layer and a polysilicon layer; forming a sacrificial layer on the polysilicon layer; forming a photoresist pattern on the sacrificial layer; performing an etching process using the photoresist pattern as a mask and, at the same time, attaching polymers on sidewalls of the etched sacrificial layer to form polymer layers, the polymers being generated from the etching of the sacrificial layer; and forming a floating gate and a tunnel oxide by removing part of the polysilicon layer and the oxide layer using the polymer layers and the photoresist pattern as a mask. The disclosed method can increase the width of a floating gate by using polymer layers in fabricating a two-bit type cell, thereby ensuring a higher coupling ratio compared to the coupling ratio of a conventional two-bit type cell.

Inventors: Han; Chang Hun (Gyeonggi-do, KR)

Assignee: Dongbu Electronics, Co., Ltd

International Classification: H01L 21/8247 (20060101)

Expiration Date: 9/05/02018