Patent Number: 7,101,783

Title: Method for forming bit-line of semiconductor device

Abstract: Disclosed is a method for forming a bit-line of a semiconductor device. In a line patterning process for forming a bit-line in a DRAM (Dynamic Random Access Memory) of a semiconductor device, a barrier metal layer and a tungsten layer are sequentially formed on an interlayer insulating film comprising a contact hole to fill the contact hole by a CVD (Chemical Vapor Deposition) method. Then, the barrier metal layer and the tungsten layer are removed until the interlayer insulating film is exposed, and a tungsten layer having small thickness is re-formed on the exposed interlayer insulating film by a PVD (physical Vapor Deposition) method. As a result, the bit-line area is reduced as much as the barrier metal layer removed from the upper portion of interlayer insulating film, thereby having low bit-line capacitance.

Inventors: Kim; Hyung Ki (Gyeonggi-do, KR)

Assignee: Hynix Semiconductor Inc.

International Classification: H01L 21/4763 (20060101)

Expiration Date: 9/05/02018