Patent Number: 7,101,814

Title: Masking without photolithography during the formation of a semiconductor device

Abstract: A method for forming a semiconductor device comprises forming a dielectric layer over a semiconductor wafer substrate assembly having closely-spaced regions, such as a memory transistor array, and widely-spaced regions, such as a periphery. Under conditions specified, the dielectric layer forms to have a first thickness over the closely-spaced regions and a second thickness over the widely-spaced regions. The second thickness is much thinner than the first thickness and dielectric over the widely-spaced regions may be etched away with a blanket etch which leaves the majority of the dielectric layer over the closely-spaced regions.

Inventors: Hill; Christopher W. (Boise, ID)

Assignee: Micron Technology, Inc.

International Classification: H01L 21/31 (20060101); H01L 21/469 (20060101)

Expiration Date: 9/05/02018