Patent Number: 7,102,167

Title: Method and system for providing a CMOS output stage utilizing a buried power buss

Abstract: A CMOS output stage is disclosed. The CMOS output stage comprises a substrate and at least one well coupled to the substrate. The CMOS output stage also includes a plurality of slots provided through the one well into the substrate. Each of the slots are oxidized. Each of the plurality of slots are filled with metal to provide a plurality of power busses. One of the power busses provides a ground. One of the power busses provides an output. One of the power busses provides a power connector. This results in the buried power buss metal always having oxide isolated surroundings. This feature allows all of these power busses to be established wherever necessary without causing any circuit issues since they are always insulated from other areas of the device. One of the power busses provides a ground. One of the power busses provides an output. One of the power busses provides a power connector.

Inventors: Husher; John Durbin (Los Altos Hills Santa Clara, CA)

Assignee: Micrel, Inc.

International Classification: H01L 27/108 (20060101)

Expiration Date: 9/05/02018