Patent Number: 7,102,169

Title: Semiconductor device

Abstract: A wiring line to which a high-frequency signal is applied is electrically connected in parallel to an auxiliary wiring line via a plurality of contact holes. The contact holes are formed through an interlayer insulting film and arranged in vertical direction to the wiring line. Since the auxiliary wiring line is formed in the same layer as an electrode that constitutes a TFT, the electric resistance of the wiring line can be reduced effectively and waveform rounding of an applied high-frequency signal can be reduced without increasing the number of manufacturing steps.

Inventors: Koyama; Jun (Kanagawa, JP), Ohtani; Hisashi (Kanagawa, JP), Ogata; Yasushi (Kanagawa, JP), Yamazaki; Shunpei (Tokyo, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

International Classification: H01L 29/15 (20060101); H01L 29/04 (20060101)

Expiration Date: 9/05/02018