Patent Number: 7,102,412

Title: Loading circuit capable of canceling DC offset and mixer using the same

Abstract: A loading circuit capable of canceling a DC offset and a mixer using the same. The loading circuit includes a first current mirror unit and a second current mirror unit for respectively receiving a first input signal and a second input signal and generating a first signal current and a second signal current proportional to the first and second input signals, a first compensation unit and a second compensation unit for respectively receiving the first and second input signals, filtering AC components of the input signals, and generating a first compensation current and a second compensation current proportional to the DC components of the first and second input signals, a first loading unit for receiving the first signal current and the second compensation current and generating a first output signal, and a second loading unit for receiving the second signal current and the first compensation current and generating a second output signal.

Inventors: Chung; Yuan-Hung (Hsin Chu County, TW)

Assignee: Sunplus Technology Co., Ltd.

International Classification: G06F 7/44 (20060101); G06G 7/16 (20060101)

Expiration Date: 9/05/02018