Patent Number: 7,102,906

Title: Logic and memory device integration

Abstract: Memory devices are adapted for direct interface or virtual integration with a processor or other logic device through a local bus and isolated from a system bus. Such memory devices are capable of lower power requirements and reduced size due in part to the elimination of certain redundant circuitry. Direct interfacing through the local bus facilitates the elimination or reduction of input/output (I/O) buffer circuitry by eliminating the need to step up to and step down from typical system bus voltage levels. Communication between the memory device and a separate logic device occurs across the local bus at voltage levels compatible with internal logic levels of the memory device.

Inventors: Fazio; Mario (Avezzano, IT)

Assignee: Micron Technology, Inc.

International Classification: G11C 5/06 (20060101); G11C 7/00 (20060101)

Expiration Date: 9/05/02018