Patent Number: 7,102,927

Title: Memory devices and programming methods that simultaneously store erase status indications for memory blocks

Abstract: Methods are provided to program a memory device having a plurality of memory blocks. A first address for selecting a row of each of the memory blocks is generated according to a multi-page program operation. A second address for selecting a memory block is received and latched, which is repeated until second addresses of memory blocks to be selected are all received and latched. Memory blocks are selected by the latched second addresses, and then the same rows of the respective selected memory blocks are simultaneously activated according to the first address. Related memory devices also are described.

Inventors: Jo; Seong-Kue (Gyeonggi-do, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: G11C 16/08 (20060101); G11C 16/16 (20060101)

Expiration Date: 9/05/02018