Patent Number: 7,102,941

Title: Semiconductor memory device and portable electronic apparatus

Abstract: A semiconductor memory device including (A) a global line; (B) a memory array having (i) a local line, (ii) a decoder connected to the global line and the local line, and (iii) a memory block and a redundant block each constructed by a plurality of memory cells each having a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, a diffusion region disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and a memory functional unit formed on both sides of the gate electrode and having the function of retaining charges, the memory array having the function that when the decoder is usable, the global line is selectively connected to one of the local lines in accordance with address information and, when a defective block is included in the memory blocks and the decoder is unusable, the local line is separated from the global line and the defective block is replaced with the redundant block; and (C) a circuit for making the decoder of the defective block unusable and, only when the defective block is addressed, for making the decoder of the redundant block usable.

Inventors: Yaoi; Yoshifumi (Yamatokoriyama, JP), Iwata; Hiroshi (Nara, JP), Shibata; Akihide (Nara, JP), Nawaki; Masaru (Nara, JP), Iwase; Yasuaki (Tenri, JP), Morikawa; Yoshinao (Ikoma, JP)

Assignee: Sharp Kabushiki Kaisha

International Classification: G11C 29/00 (20060101); G11C 7/00 (20060101)

Expiration Date: 9/05/02018