Patent Number: 7,102,960

Title: Semiconductor memory device

Abstract: A word control circuit activates word lines corresponding to a start row address and a next row address overlappingly in the continuous mode. Accordingly, even in the case where the start address indicates an end memory cell connected to a word line, the switching operation of the word line becomes unnecessary. Memory cells connected to different word lines can be thus accessed in a sequential manner. That is, a controller accessing a semiconductor memory device can access the memory without data interruption. This can prevent the data transfer rate from lowering. Furthermore, it is made unnecessary to form a signal and a control circuit for informing a controller of the fact that a word line is being switched so that the construction of a semiconductor memory device and a control circuit of the controller can be simplified. This results in reduction of the system cost.

Inventors: Ikeda; Hitoshi (Kawasaki, JP), Fujioka; Shinya (Kawasaki, JP), Sawamura; Takahiro (Kawasaki, JP)

Assignee: Fujitsu Limited

International Classification: G11C 8/00 (20060101)

Expiration Date: 9/05/02018