Patent Number: 7,103,039

Title: Hardware load balancing through multiple fabrics

Abstract: The present invention relates to a method and apparatus for balancing loads in multiple switching fabrics. Each switching fabric comprises data ports through which data frames enter or exit the switching fabric. In one embodiment, the apparatus includes a buffer and a routing data generation circuit. The buffer receives a data frame to be transmitted to a destination device via one of the switching fabrics coupled thereto. The routing data generation circuit is coupled to the buffer. The routing data generation circuit generates and adds routing data to the data frame received by the buffer. The routing data identifies one of the data ports of one of the switching fabrics through which the data frame will exit to reach the destination device. After the routing data is added to the data frame, the buffer transmits the data frame to one of the switching system.

Inventors: Rose; Kenneth (Palo Alto, CA)

Assignee: Cisco Technology, Inc.

International Classification: H04Q 11/00 (20060101); G06F 15/173 (20060101); H04L 12/56 (20060101)

Expiration Date: 9/05/02018