Patent Number: 7,132,303

Title: Stacked semiconductor device assembly and method for forming

Abstract: One embodiment relates to using a robust metal layer of a semiconductor device to form landing pads. In one embodiment, a sputterable, nonwettable refractory metal is used as a solder mask for the landing pads. A second device may then be coupled to the robust metal layer landing pads of the semiconductor device. In one embodiment, the landing pads are formed while the semiconductor device is in wafer form, and a second device is then coupled to the landing pads of each of the plurality of semiconductor devices within the wafer, such that each semiconductor device within the wafer is electrically coupled to a second device. In this manner, each semiconductor device within the wafer and its corresponding second device may be probed and tested as a system. After probing and testing, the wafer may be singulated into a plurality of individual device assemblies which may then be packaged.

Inventors: Wang; James J. (Phoenix, AZ), Magnus; Alan J. (Gilbert, AZ), Poarch; Justin E. (Gilbert, AZ)

Assignee: Freescale Semiconductor, Inc.

International Classification: H01L 21/00 (20060101)

Expiration Date: 2019-11-07 0:00:00