Patent Number: 7,132,330

Title: Nonvolatile semiconductor memory device with improved gate oxide film arrangement

Abstract: In a nonvolatile semiconductor memory device, an interpoly dielectric film composed of a nitrogen-introduced CVD SiO.sub.2 film is used as the gate oxide films of MOS transistors in a low voltage region of a peripheral circuit region. Gate oxide films of MOS transistors in a high voltage region of the peripheral circuit region are composed of a laminate of the SiO.sub.2 film and a nitrogen-introduced CVD SiO.sub.2 film. This arrangement improves transistor characteristics and reliability of gate oxide films of the peripheral circuit MOS transistors. It is also possible to realize miniaturization and low voltage operation. Further, simplification of the production process is made possible.

Inventors: Kobayashi; Takashi (Tokorozawa, JP)

Assignee: Renesas Technology Corp.

International Classification: H01L 21/336 (20060101)

Expiration Date: 2019-11-07 0:00:00