Patent Number: 7,132,358

Title: Method of forming solder bump with reduced surface defects

Abstract: A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a second UBM layer may be formed on the first photoresist pattern. A second photoresist pattern may be formed that exposes the first UBM layer and covers the second UBM layer. A solder bump may be formed in the opening. The second photoresist pattern and the first photoresist pattern may be removed using a stripper, thereby removing the second UBM layer by a lift-off method.

Inventors: Jeong; Se-Young (Seoul, KR), Choi; Jin-Hak (Suwon-si, KR), Kim; Nam-Seog (Yongin-si, KR), Lee; Kang-Wook (Suwon-si, KR)

Assignee: Samsung Electronics Co., Ltd.

International Classification: H01L 21/44 (20060101)

Expiration Date: 2019-11-07 0:00:00